1. Field of the Invention
This invention relates generally to semiconductor processing methods, and more particularly, it relates to a method for manufacturing a non-volatile semiconductor device having a PECVD nitride cap layer which includes a LPCVD barrier layer formed under the cap layer and over the floating gate so as to protect the floating gate from charge loss.
2. Description of the Prior Art
In view of the trend in the semiconductor industry for achieving higher and higher packing densities in integrated circuits, multilayer interconnects are being used to connect the electrical components on two different levels. Typically, a PECVD nitride cap layer is formed underneath a BPTEOS layer which is used as an interlayer dielectric (ILD) between the two different levels. Unfortunately, the PECVD nitride cap layer has a high hydrogen ion content. As is generally known, one of the major concerns in the fabrication of non-volatile memory devices is that of high temperature data retention which is believed to be caused by mobile hydrogen ions. These mobile ions can diffuse to the floating gate in the non-volatile memory devices and cause charge loss.
Traditionally, the prior art semiconductor processing for non-volatile memory devices having a PECVD nitride cap layer formed underneath the BPTEOS oxide films utilized a phosphorus implant into the cap layer followed by a high temperature heat treatment (e.g., RTA) at about 800.degree. C. for removing of the free hydrogen ions. Further, a hydrogen getter layer may be formed over the floating gate so as to order to getter mobile ions that may be present in the semiconductor device and thus obtain good data retention. For a complete discussion of this prior art technique, reference is made to U.S. Pat. No. 5,940,735 issued on Aug. 17,1999 and entitled "Reduction of Charge Loss in Nonvolatile Memory Cells by Phosphorus Implantation into PECVD Nitride/Oxynitride Films" which is hereby incorporated in its entirety by reference.
Accordingly, there has arisen a need for a method for manufacturing a non-volatile memory device having a PECVD nitride cap layer which eliminates the phosphorus implant followed the high temperature RTA process, but yet protect the floating gate from charge loss. This is achieved in the present invention by forming a LPCVD nitride film under the PECVD nitride cap layer and over the floating gate so as to protect the floating gate from charge loss.